CVE Catalog

CVE-2026-43191

MediumCVSS 5.5
Published: Updated: Translated: NVD NIST

Exploitation Probability (EPSS)

Low risk
0.16%

5th percentile - higher than 5% of all known CVEs

Summary

On DCN35, disabling TMDS output turned off the PHY PLL, which caused the OTG to remain stuck and could lead to a hang in DCHVM's ability to ACK invalidations. The fix backports the DCN401 implementation to DCN35, ensuring an atomic PHY FSM transition to PLL_ON.

Risk Assessment

A graphics system hang may occur on AMD DCN35 platforms due to the OTG being stuck and global sync issues.

Recommendation

Update the Linux kernel to a version containing the fix in the drm/amd/display driver for DCN35.

Other vulnerabilities in Linux kernel

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Original NVD description (English source)

In the Linux kernel, the following vulnerability has been resolved: drm/amd/display: Adjust PHY FSM transition to TX_EN-to-PLL_ON for TMDS on DCN35 [Why] A backport of the change made for DCN401 that addresses an issue where we turn off the PHY PLL when disabling TMDS output, which causes the OTG to remain stuck. The OTG being stuck can lead to a hang in the DCHVM's ability to ACK invalidations when it thinks the HUBP is still on but it's not receiving global sync. The transition to PLL_ON needs to be atomic as there's no guarantee that the thread isn't pre-empted or is able to complete before the IOMMU watchdog times out. [How] Backport the implementation from dcn401 back to dcn35. There's a functional difference in when the eDP output is disabled in dcn401 code so we don't want to utilize it directly.

Vulnerability data from NVD (NIST) · CISA KEV · EPSS