CVE-2026-93168
Low risk· EPSS 6%Exploitation Probability (EPSS)
Low risk6th percentile - higher than 6% of all known CVEs
Summary
In the Linux kernel, the dmaengine xilinx_dma driver's xilinx_dma_poll_timeout function, when called with delay_us=0 and a condition that is never fulfilled, caused the CPU to busy-wait for a prolonged time. Instead of timing out after approximately XILINX_DMA_LOOP_COUNT microseconds, the timeout occurred after several minutes, leading to a CPU stall. The fix introduces the XILINX_DMA_POLL_DELAY_US constant and uses delay_us=10.
Risk Assessment
On unexpected hardware failures, the DMA driver can stall the CPU for several minutes, causing system hangs or service unavailability. Systems with Xilinx DMA controllers are affected.
Recommendation
Update the Linux kernel to a version containing the fix for CVE-2026-93168. If updating is not possible, avoid configurations that call xilinx_dma_poll_timeout with delay_us=0.
Other vulnerabilities in Linux kernel
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Original NVD description (English source)
In the Linux kernel, the following vulnerability has been resolved: dmaengine: xilinx_dma: Fix CPU stall in xilinx_dma_poll_timeout Currently when calling xilinx_dma_poll_timeout with delay_us=0 and a condition that is never fulfilled, the CPU busy-waits for prolonged time and the timeout triggers only with a massive delay causing a CPU stall. This happens due to a huge underestimation of wall clock time in poll_timeout_us_atomic. Commit 7349a69cf312 ("iopoll: Do not use timekeeping in read_poll_timeout_atomic()") changed the behavior to no longer use ktime_get at the expense of underestimation of wall clock time which appears to be very large for delay_us=0. Instead of timing out after approximately XILINX_DMA_LOOP_COUNT microseconds, the timeout takes XILINX_DMA_LOOP_COUNT * 1000 * (time that the overhead of the for loop in poll_timeout_us_atomic takes) which is in the range of several minutes for XILINX_DMA_LOOP_COUNT=1000000. Fix this by using a non-zero value for delay_us. Use delay_us=10 to keep the delay in the hot path of starting DMA transfers minimal but still avoid CPU stalls in case of unexpected hardware failures. One-off measurement with delay_us=0 causes the cpu to busy wait around 7 minutes in the timeout case. After applying this patch with delay_us=10 the measured timeout was 1053428 microseconds which is roughly equivalent to the expected 1000000 microseconds specified in XILINX_DMA_LOOP_COUNT. Add a constant XILINX_DMA_POLL_DELAY_US for delay_us value.
Vulnerability data from NVD (NIST) · CISA KEV · EPSS

