CVE Catalog

CVE-2025-39752

MediumCVSS 5.5
Published: Updated: Translated: NVD NIST

Exploitation Probability (EPSS)

Low risk
0.18%

7th percentile - higher than 7% of all known CVEs

Summary

In the Linux kernel on ARM Rockchip, trampoline code for secondary CPUs was written to SRAM while secondary cores were powered on, sometimes causing a kernel hang during SMP initialization. The fix moves SRAM initialization to when all secondary CPUs are powered down.

Risk Assessment

May cause rare kernel hangs at boot on devices with Rockchip SoCs (e.g., RK3188), leading to device unavailability.

Recommendation

Update the Linux kernel to a version containing the fix for the ARM Rockchip platform.

Other vulnerabilities in Linux kernel

See all
Original NVD description (English source)

In the Linux kernel, the following vulnerability has been resolved: ARM: rockchip: fix kernel hang during smp initialization In order to bring up secondary CPUs main CPU write trampoline code to SRAM. The trampoline code is written while secondary CPUs are powered on (at least that true for RK3188 CPU). Sometimes that leads to kernel hang. Probably because secondary CPU execute trampoline code while kernel doesn't expect. The patch moves SRAM initialization step to the point where all secondary CPUs are powered down. That fixes rarely hangs on RK3188: [ 0.091568] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.091996] rockchip_smp_prepare_cpus: ncores 4

Vulnerability data from NVD (NIST) · CISA KEV · EPSS