CVE-2025-35979

Incomplete cleanup in specific special register write operations for some Intel processors may allow an authenticated user to potentially enable information disclosure via local access.

Incomplete cleanup of microarchitectural fill buffers on some Intel processors may allow an authenticated user to potentially enable information disclosure via local access.

Incomplete cleanup of multi-core shared buffers for some Intel processors may allow an authenticated user to potentially enable information disclosure via local access.

Some Intel(R) processors are vulnerable to information disclosure caused by incorrect data forwarding during transient execution in Ring 0 (hypervisor and kernel). A system software adversary with a privileged user and a high complexity attack may enable data exposure. This requires local access but no user interaction. The vulnerability may impact system confidentiality (high), but not integrity or availability.

Improper handling of overlap between protected memory ranges in some microcode for some Intel(R) Processors within Ring 0: Hypervisor may allow an escalation of privilege. The attack requires a privileged user, low complexity, and local access, with no user interaction. The vulnerability impacts confidentiality, integrity, and availability (high).

Improper access control in some Intel processors in the user application layer may allow an escalation of privilege. The attack requires an authenticated user, high complexity, and special internal knowledge, but no user interaction. The vulnerability impacts confidentiality and integrity (high), with no impact on availability.

Improper handling of values in some Intel processors at Ring 0 (kernel, hypervisor, bare metal OS) may allow privilege escalation. An authorized adversary with a privileged user and a high complexity attack can escalate privileges via local access with special internal knowledge and no user interaction. The vulnerability may impact confidentiality and integrity but not availability.

A vulnerability in the microarchitecture of Intel processors allows disclosure of sensitive information during transient execution. An authenticated user with local access can potentially read data that should not be accessible.

A vulnerability in some Intel(R) Processors involves non-transparent sharing of return predictor targets between contexts. This may allow an authorized user to potentially enable information disclosure via local access.

Hardware allows activation of test or debug logic at runtime for some Intel(R) processors which may allow an unauthenticated user to potentially enable escalation of privilege via physical access.