CVE-2026-53036
HighCVSS 7.8Exploitation Probability (EPSS)
Low risk4th percentile — higher than 4% of all known CVEs
Summary
In the Linux kernel, the BPF JIT for ARM64 has an off-by-one error in the check_imm macro that validates branch displacement fits into a signed N-bit immediate field. The error allows values one bit wider than intended, potentially causing incorrect instruction encoding and reversing branch direction.
Risk Assessment
The organization may experience unpredictable system behavior, including errors in BPF programs, potentially leading to crashes or data integrity violations.
Recommendation
Immediately update the Linux kernel to a version containing the fix for the off-by-one error in the check_imm macro for the ARM64 architecture.
Original NVD description (English source)
In the Linux kernel, the following vulnerability has been resolved: bpf, arm64: Fix off-by-one in check_imm signed range check check_imm(bits, imm) is used in the arm64 BPF JIT to verify that a branch displacement (in arm64 instruction units) fits into the signed N-bit immediate field of a B, B.cond or CBZ/CBNZ encoding before it is handed to the encoder. The macro currently tests for (imm > 0 && imm >> bits) || (imm < 0 && ~imm >> bits) which admits values in [-2^N, 2^N) — effectively a signed (N+1)-bit range. A signed N-bit field only holds [-2^(N-1), 2^(N-1)), so the check admits one extra bit of range on each side. In particular, for check_imm19(), values in [2^18, 2^19) slip past the check but do not fit into the 19-bit signed imm19 field of B.cond. aarch64_insn_encode_immediate() then masks the raw value into the 19-bit field, setting bit 18 (the sign bit) and flipping a forward branch into a backward one. Same class of issue exists for check_imm26() and the B/BL encoding. Shift by (bits - 1) instead of bits so the actual signed N-bit range is enforced.